Allen Chen

• Master of electronic engineering. • 14+ years of experience in ASIC design and verification with silicon proven. • DV technical lead over 20 engineers globally. • In-depth knowledge of design and verification development flow from spec to tape out. Experienced process technology from 80nm to 7nm. • Proficient with Verilog / System Verilog / UVM / C++/ C / Perl / Shell. • Working knowledge of various protocols and interfaces such as AMBA, SDP (AMD internal), SNP, PCI, USB, PIPE, I2C, etc. • In-depth knowledge of system virtualization and security. • Familiar with mainstream EDA tools as VCS, Verdi, NC, Debussy, Formal etc. • Strong organizational and technical leadership skills. • Spoken and written languages: Chinese and English.