Erik Wallerbos
team lead algorithms for wafer fab applications at asml@ ASML
Eindhoven, Noord-brabant, Netherlands
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Erik Wallerbos is a highly experienced professional with 33.4 years of work experience in metrology, semiconductors, physics, design of experiments, mathematical modeling, lithography, statistics, software development, optics, experimentation, R&D, embedded software, and MATLAB. He is based in Eindhoven, Netherlands. Erik has worked at ASML in various roles, including Team Lead Algorithm Development for Wafer Fab Applications and Product Architect. He also has experience as a Designer Metrology at ASML and as a Post-doc at Delft University of Technology.
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Emails and Phone Numbers

@asml.com
@asml.com
@gmail.com
@chello.nl
@gmail.com
+31 402683****
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About

Specialties: stage position measurement mathematical modeling calibration of model parameters process corrections design of experiments statistics team/project lead

Work Experience

De Run 6501, Veldhoven, 5504DR, NL

Semiconductor Manufacturing

37052
Phone
+31 402683000
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Erik Wallerbos's Professional Milestones

  • Graduation (1991-09-01~1992-04-01): Successfully completed numerous coursework and coursework, showcasing exceptional student achievement and dedication.
  • team lead algorithms for wafer fab applications at asml (2013-05-01~): Designing and implementing cutting-edge algorithms to streamline software development processes and drive innovation in the organization.
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Education

Delft University of Technology
Delft University of Technology

Physics

1993-1997
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