Gopal Chandnani
Senior Verification Engineer@ MediaTek
Bengaluru, Karnataka, India
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Gopal Chandnani is an experienced Project Engineer with 7.2 years of work experience in the semiconductors industry. He is skilled in Universal Verification Methodology (UVM), Microsoft Excel, SystemVerilog, C (Programming Language), and C. He holds a Bachelor's degree in Electrical, Electronics and Communications Engineering from Ahmedabad Institute Of Technology. Gopal has worked at Aceic Design Technologies as a Verification Project Engineer and at Synapse Design Inc. as a Senior Design Verification Engineer. He is based in Bengaluru, Karnataka, India.
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Emails and Phone Numbers

@mediatek.com
@synapse-da.com
@synapse.com
+1 408850****
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About

Experienced Project Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Universal Verification Methodology (UVM), Microsoft Excel, SystemVerilog, C (Programming Language), and C++. Strong information technology professional with a Bachelor's degree focused in Electrical, Electronics and Communications Engineering from Ahmedabad Institute Of Technology.

Work Experience

No.1, Dusing Rd. 1, Hsin-Chu, 30078, TW

Semiconductor Manufacturing

12229
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Gopal Chandnani's Professional Milestones

  • Verification Project Engineer (2017-04-01~2017-10-01): Successfully implemented advanced verification software to evaluate and optimize testing processes.
  • Senior Design Verification Engineer: Developed and implemented efficient verification strategies to streamline design processes and ensure product compliance.

Education

Chatrapati Sahuji Maharaj Kanpur University, Kanpur
Chatrapati Sahuji Maharaj Kanpur University, Kanpur

Electronics,

Engineering,

Communications,

Bachelors

2013-2017