Ifar Wan

Skillful problem solver with interest in VLSI digital circuit design, pre/post-Si Design Verification and Validation, DFT methodologies and object-oriented software programming. Acquired significant experience in pre-Si design verification and validation, as well as post-Si characterization, test and debug of Intel-Architecture microprocessors and memory components. Worked extensively with high-speed ATE (Advantest and Credence) platforms and industry standard DFT techniques, such as IEEE JTAG TAP, memory array BIST/PBIST, scan ATPG and boundary scan. Additional technical skills include: expertise in C/C++ and PERL programming languages, in RTL hardware description languages, such as VHDL and Verilog, and in Hardware Verification language, such as Specman e-language.