Jingkui Zheng
Senior Engineer@ Western Digital
San Jose, California, United States
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Jingkui Zheng is a highly skilled 3D NAND developer with 11.6 years of experience. Based in the United States, he specializes in logic design, verification, synthesis, and various other technologies. With expertise in Verilog/System Verilog, C/C, Python, TCL, Perl, and assembly language, Jingkui has worked with renowned companies like Western Digital and IBM. He has also gained laboratory experience with oscilloscope, DC analyzer, vector network analyzer, and spectrum analyzer. Jingkui's extensive experience and knowledge make him a valuable asset in the field of engineering and technical expertise.
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Emails and Phone Numbers

+1 800801****
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About

▶ 3D NAND Flash, logic design, verification, synthesis, STA, silicone debug, microprocessors and FPGA. ▶ Verilog/System Verilog, C/C++, Python, TCL, Perl, assembly language. ▶ Cadence/Synopsys tools, Verdi, PrimeTime, DC, Incisive, Virtuoso; Xilinx ISE, Linux, Matlab, JMT, CST. ▶ Laboratory experience with oscilloscope, DC analyzer, vector network analyzer, spectrum analyzer

Work Experience

5601 Great Oaks Parkway, San Jose, CA, 95138, US

Computer Hardware Manufacturing

27117
Phone
+1 8008014618
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Jingkui Zheng's Professional Milestones

  • Design Engineer Ii (2016-05-01~2017-01-01): Developed cutting-edge solutions, optimizing performance and driving innovation in the engineering industry.
  • Senior Engineer (2017-01-01~): Designing and implementing advanced analytical tools for complex engineering projects.
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