Lorenzo Zuolo

Lorenzo Zuolo received the M.Sc. degree in Technology for Telecommunications and Electronic Engineering, and the Ph.D. in Engineering Science from the University of Ferrara in 2012 and 2016, respectively. From 2016 to 2017 he held a Research Assistant position with the Engineer department of the same institution working on architectural/physical simulations of Solid State Drives (SSD) and emerging non-volatile memories. During the same period, he has been also CTO and co-founder of SSDVision, a start-up focused on the development of CAD tools for the design and performance evaluation of SSDs. From June 2017 to July 2021, he joined the Flash Signal Processing Lab (FSPL) at Microsemi Corp (now Microchip Corp) to work on efficient Error Correction Code strategies and Machine Learning algorithms for NAND flash-based SSDs. During this period, he was in charge for the design of the first Machine-Learning hardware engine for the FlashTec NVMe controller family.Specializations: Solid State Drives (SSDs) architecture-, reliability-, and design, Performance simulations, NAND flash memories, Error Correction Codes (LDPC), Machine Learning algorithms and HW design, non-volatile emerging memories, High performance storage systems, Computer architecture, Linux OS.