Senior Analog IC Design Engineer@ Parade Technologies, Inc.
Taiwan
Mazer Lin
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National Tsing Hua University
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FlashIntel GPTMazer Lin is a Senior engineer with 14.6 years of experience in semiconductors and manufacturing. He has expertise in cross-functional team leadership, product management, and engineering. Mazer has worked at Parade Technologies, Inc. in San Jose, California as a Senior Analog Ic Design Engineer and at HTC in Taiwan as an Audio Engineer. He is skilled in debugging and SOC. Mazer is based in Taiwan and has a strong background in semiconductor manufacturing and electronics manufacturing.
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About
PARADE TECHNOLOGY LTD.的Senior engineer
Work Experience
Senior Analog IC Design Engineer
Semiconductor Manufacturing
Mazer Lin's Professional Milestones
- Senior Analog IC Design Engineer (2013-05-01~): Designing cutting-edge digital CD-ROMs for a wide range of industries, driving innovation and enhancing quality of audiovisual materials
- Audio Engineer (2009-02-01~2010-03-01): Designing and implementing cutting-edge audio systems to enhance visual quality and create captivating experiences.
Education
Electronics Engineering,
Master Of Science,
Masters,
Engineering,
Bachelors,
Bachelor Of Science
2001-2005Skill
Semiconductors
Manufacturing
Cross Functional Team Leadership
Ic
Asic
Product Management
Engineering
Debugging
Soc
Certification
Colleagues
Dale Edmondson
Vice President Of Legal
Joe Montalbo
Senior Vice President
Judy Wang
Senior Vice President Of Finance
Peter Oaklander
svp ww sales at parade technologies inc
Jing-fan Zhang
Vice President of USB Business
Other Named Mazer Lin
Frequently asked questions
We found 1 Mazer Lin's email addresses
We found 3 Mazer Lin's phone numbers
Mazer Lin's social media include: Linkedin,
Mazer Lin works for Parade Technologies, Inc.
Mazer Lin's role in Parade Technologies, Inc. is Senior Analog IC Design Engineer
Mazer Lin works in the industry of Semiconductor Manufacturing
Mazer Lin's colleagues are Dale Edmondson,Joe Montalbo,Judy Wang
Mazer Lin's latest job experience is Senior Analog IC Design Engineer at Parade Technologies, Inc.
Mazer Lin's latest education in National Tsing Hua University
