Raffaele Fusciello
意大利米兰理工大学
Tell me more about Raffaele Fusciello?
Raffaele Fusciello is a highly experienced professional with 18.9 years of work experience in the field of digital and mix signal physical design implementation. Based in the United States, she has a strong skill set in CMOS, SOC, ASIC, and mixed signal. Raffaele has worked on various tapeouts, including small Asic for imaging applications and 50 milion placeable instances of hierarchical designs for network applications. She has expertise in floorplanning, flip chip and wirebond padframe creation, custom analog and balanced routing, and scheduling optimization. Raffaele is known for her fact-based approach and problem-solving abilities.
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About
24 years HANDS ON digital and mix signal physical design implementation (RTL2GDS) experience. Dozens of tapeouts ranging from small Asic for imaging applications to 50+ milion placeable instances hierarchical designs for network applications. This includes: - Hierarchical and flat Floorplanning. - Flip chip and wirebond padframe and bumpout creation from scratch. - Custom analog and balanced routing. - Hierarchical and flat clock tree planning and insertion - Hierarchical and flat placement and timing optimization - Hierarchical and flat STA, IRdrop and power analysis and optimization - Hierarchical and flat DRC/LVS/ESD/LATCHUP check, debug and fix - Lots and lots of work-around scripting (tcl/Perl/skill) NO NONSENSE fact based approach and problem solving.
...See MoreWork Experience
senior design manager at stmicroelectronics
Princ Design Eng
Semiconductor Manufacturing
Raffaele Fusciello's Professional Milestones
- Princ Design Eng (2005-01-01~2008-02-01): Driving design excellence through innovative projects, integrating innovative technologies, and fostering a culture of collaboration.
- senior design manager at stmicroelectronics (2008-02-01~): Driving design excellence, resulting in increased product development and enhancing customer satisfaction standards.
Education
Electrical And Electronics Engineering
1981-1987Skill
Cmos
Soc
Asic
Ic
Mixed Signal
Rtl Design
Eda
Physical Design
Static Timing Analysis
Lvs
Drc
Low Power Design
Floorplanning
Debugging
Certification
Colleagues
Marjorie Delrieu 🍓
UX Designer | Product Owner
Sivakumar K.Vadivelu
sr engineer wafer fab system owner
Wahid I.
Equipment Engineer | Tool Owner | Photolithography Area
Mirko Cagnetta
Area Owner
Florent Paras
process owner en métrologie chez stmicroelectronics
Other Named Raffaele Fusciello
Frequently asked questions
Raffaele Fusciello's social media include: Linkedin,
Raffaele Fusciello works for STMicroelectronics
Raffaele Fusciello's role in STMicroelectronics is senior design manager at stmicroelectronics
Raffaele Fusciello works in the industry of Semiconductor Manufacturing
Raffaele Fusciello's colleagues are Marjorie Delrieu 🍓,Sivakumar K.Vadivelu,Wahid I.
Raffaele Fusciello's latest job experience is senior design manager at stmicroelectronics at STMicroelectronics
Raffaele Fusciello's latest education in 意大利米兰理工大学