Ramya Nerabetla
senior design verification engineer at marvell semiconductor@ Marvell Technology
Santa Clara, California, United States
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Ramya Nerabetla is a Senior Design Verification Engineer at Marvell Semiconductor with 16.3 years of experience. She is skilled in systemverilog, soc, verilog, computer architecture, asic, debugging, specman, low power design, vlsi, functional verification, microarchitecture, logic design, and semiconductors. She is based in the United States. Ramya has worked at Marvell Technology and Intel Corporation, gaining valuable experience in the semiconductor manufacturing industry. She has a strong background in design verification and has worked with a wide range of customers, including enterprises, data centers, and government agencies.
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About

Senior Design Verification Engineer at Marvell Semiconductor

Work Experience

5488 Marvell Lane, Santa Clara, CA, 95054, US

Semiconductor Manufacturing

7742
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Ramya Nerabetla's Professional Milestones

  • Design Verification Engineer (2007-06-01~2013-10-01): Implementing robust verification processes and processes to ensure accuracy and compliance with regulatory requirements.
  • Senior Design Verification Engineer (2013-11-01~): Implementing efficient verification strategies to optimize product quality and mitigate defects.
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Education

Jawaharlal Nehru Technological University
Jawaharlal Nehru Technological University

Communication,

Engineering,

Electronics

2002-2006