Tao Tran
Senior Principal Design Engineer@ Cadence Design Systems
San Jose, California, United States
View Tao Tran's Email
View Tao Tran's Email & Phone
Real-Time AI Research
0 search queries left
FlashIntel GPT
Hello! I'm FlashIntel GPT, your personal AI search assistant. Feel free to ask me anything about Tao Tran, and I'll do my best to assist you.
You

Tell me more about Tao Tran?

FlashIntel GPT

Tao Tran is a highly skilled professional with 14.1 years of experience in various design and engineering roles. He has expertise in SOC, FPGA, ASIC, RTL design, Verilog, Xilinx, and more. Currently, he works at AppliedMicro as a Senior Principal Design Engineer. Prior to this, he held positions at Qualcomm and AppliedMicro, where he gained valuable experience in semiconductor manufacturing and ARM architecture. Tao Tran is based in the United States and has a strong background in embedded systems and functional verification.
For inquiries about Phone Number and Email, please click here Unlock Contact

Research Details
Skills & Insights
Colleagues

Emails and Phone Numbers

@apm.com
@cadence.com
+1 408943****
+1 669237****
View Emails and Phone Numbers
10 free lookups per month

About

AppliedMicro. November 2014 – Present (10 months)Sunnyvale CA .... Duong Nguyen. Architect (FPGA) at Robert Bosch Engineering Vietnam...

Work Experience

2655 Seely Avenue, San Jose, California, 95134, US

Software Development

9598
Phone
+1 4089431234
Show More

Tao Tran's Professional Milestones

  • Staff Design Engineer (2016-09-01~2019-08-01): Optimized system performance through cutting-edge technology solutions and seamless coordination in engineering projects.
  • Asic Design Engineer (2011-08-01~2014-10-01): Successfully developed cutting-edge AI solutions, driving technological advancements and increasing product availability.
Show More