Terry Choon Yi Gan
SOC Design Engineering Manager@ Intel Corporation
Bayan Lepas, Penang, Malaysia
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Terry Choon Yi Gan is a highly experienced Pre Silicon Validation Engineer with 16.4 years of work experience. He has a strong skill set in silicon validation, debugging, cross-functional team leadership, scrum, testing, processors, computer architecture, functional verification, and microprocessors. Based in Malaysia, Terry currently works at Intel Microelectronics Sdn Bhd. He has previously held positions at Intel Corporation in California, Santa Clara, where he served as a Soc Design Engineering Manager and Test Engineer. Terry's expertise and experience make him a valuable asset in the field of semiconductor manufacturing.
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Emails and Phone Numbers

@intel.com
@intc.com
+60 408765****
+1 408765****
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About

Pre Silicon Validation Engineer at Intel Microelectronics Sdn Bhd.

Work Experience

Robert Noyce Building, Santa Clara, California, 95052, US

Semiconductor Manufacturing

123387
Phone
+1 0493001400

Terry Choon Yi Gan's Professional Milestones

  • SOC Design Engineering Manager (2007-11-01~2014-05-01): Implementing efficient design processes, optimizing project timelines, and enhancing team collaboration for successful implementation of new solutions.
  • SOC Design Engineering Manager (2014-05-01~): Successfully implemented new SCADA systems, optimizing user experience and driving increased customer satisfaction and customer satisfaction.

Education

Universiti Teknologi Malaysia
Universiti Teknologi Malaysia

Computer Engineering,

Bachelors

2002-2007