Terry Lin

Highly experienced system hardware architect with a keen focus on high speed system board designs for servers, switches and networking products. Hands on experience with microcontroller designer and CPLD/FPGA designs Solid understanding of system level design and debugging knowledge of high performance 10 Gigabit Ethernet components and interfaces. Proficient on the bring up process of Cisco’s system ASIC and validation on system boards. Deep knowledge of Linux embedded system environments, FCoE and TCP/IP communication protocols and standards. Possesses a strong technical background on high end CPUs with multi sockets, cores and high speed IO interfaces Solid understanding of high speed signal integrity, high density multilayer PCB layout, Cadence layout constraint manager, PCB stack up, PCB fabrication technology and power distribution. Highly adaptable individual with fast learning capabilities on the latest hardware platforms and market trends. Specialties: System Architecture, High End CPU with High Speed Buses-like SFI, XAUI, PCIe (gen 2), DDR3, QPI,HT on Networking/Switches/Servers System Design, Bring Ups, Testing, Validation, Linux Embedded System Environments, Products Sustenance, Cadence-Concept, Allegro, Orcad, Verilog, Synplicity-Synplify Pro, Synopsys-Virsim, Altera-Quartus II, Xilinx-ISE