Tsung Hua Tsai
Product Engineer@ Intel Corporation
Taichung City, Taiwan, Taiwan
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Tsung Hua Tsai is a professional with 7.4 years of experience in Taiwan. He is currently working at Intel Corporation in Santa Clara, California as an Assembly Packaging And Test Engineer. Tsung has also worked as a Computational Solid Mechanics Lab and as Jian Ren Zhu Li. He has expertise in electronic packaging reliability analysis and life prediction. Tsung's work experience includes roles as a Product Engineer and Assembly Packaging And Test Engineer at Intel Corporation.
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Emails and Phone Numbers

@intel.com
@intc.com
+1 408765****
+1 408765****
+1 049300****
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About

Cooperate with OSAT to manage HW/SW related information to improve the HVM yield rate of the 3D NAND test part. Using AI machine learning algorithms for electronic packaging reliability analysis and life prediction.

Work Experience

Robert Noyce Building, Santa Clara, California, 95052, US

Semiconductor Manufacturing

123387
Phone
+1 0493001400
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Tsung Hua Tsai's Professional Milestones

  • Assembly Packaging And Test Engineer (2020-10-01~): Streamlined production processes, optimizing efficiency and meeting strict deadlines for inventory management.
  • Computational Solid Mechanics Lab (2018-07-01~2020-08-01): Designing and implementing cutting-edge technologies to drive innovation and accelerate the advancement of solid mechanical manufacturing.
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Education

National Tsing Hua University
National Tsing Hua University

動力機械工程學系

2018-2020
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