Uttam Kumar Dubey

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Uttam Kumar Dubey is a highly skilled SOC Implementation Expert with 19.2 years of experience. He has expertise in scripting, static timing analysis, asic, timing closure, TCL, debugging, physical design, EDA, VLSI, Verilog, SOC, functional verification, formal verification, RTL design, systemverilog, VHDL, and Perl. He has worked at Intel Corporation as a Soc Design Engineer and at Cadence Design Systems as a Lead Product Engineer. He also has experience at Wipro as a Senior VLSI Design Engineer. Uttam Kumar Dubey is based in Bengaluru, Karnataka, India.
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