Vatsa Prahallada

Automotive & Automation - [Current: Technical Director]- Provide tooling and manage Functional Safety for design enablement.- Develop diagnostics and related solutions. Act as a liasion b/w DFT and PETE teams for solution development.- Co-chairing companywide Traceability TFM board.- Work with the design teams to develop homegrown flows and infratructure.- Work with the program management teams to develop automation suites.Automotive CAD - Functional Safety [Past]- Operate as Global Automotive Hardware CAD Lead - ISO26262 certified- Interface b/w software, systems, and Safety domainsPublic Git: https://github.com/vatsamailEDA Operations [Past]- A member of EDA operations team that is responsible for managing EDA infrastructure across the company. - With a proven track record of saving millions of dollars by strategically migrating to different EDA tool vendors. - Responsible for forecasting multi-million dollar EDA budget by using statistical models, engineering forecasts and product roadmaps. - With strong engagement with the vendors, engineering domain experts, and the management, the team operates by optimizing, scheduling and predicting nonrecurring engineering costs.- An automation evangelist methodically deploying production worthy solutions using various python based frameworks [Django, Numpy, Pandas, Keras] on a platform composed of MySQL, Jenkins, Perforce using Kanban methodology. DFT Diagnostics tool developer [Past] - Led the high volume diagnostics tool development team. Conceived-Constructed-Implemented-Deployed-Trained many in-house tools and methodologies. Closely worked with Pre silicon DFT and simulation engineers, Test and product engineers, IT engineers, Yield, and Failure analysis engineers to develop innovative solutions in the field of product and test engineering relying on Scrum ideologies.Simulations tool developer [Past] - Started as a simulation tools developer at Qualcomm. I was responsible for developing in-house Iddq estimation tools, pre-silicon cross-domain correlation tools. I was the developer of the automation suite for conducting silicon debug and the first-generation tracking and monitoring systems. Automation Engineer [Past] - Started my career at Intel as a design automation engineer, learning the concepts of VLSI and co-developing automation solutions for conducting pre-silicon performance verification. I was responsible for conducting full-chip timing analysis for Xeon processors. I also partnered with post-silicon engineering team to enhance and co-develop a speed-path debug tool.