Yash Vyavaharkar
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Yash Vyavaharkar is a highly experienced Physical Design and STA team lead with 14.8 years of work experience. He specializes in static timing analysis, asic, physical design, soc, and tcl. Based in San Francisco, California, Yash has a solid technical base and strong communication skills. He has a proven track record of leading execution on complex and cutting-edge chips across multiple technology nodes over 10 years. Yash's expertise includes designing and implementing custom solutions for structured place and route, optimizing physical design implementation, and improving efficiency. He has held positions at Apple and Texas Instruments, where he has demonstrated his skills in technical leadership and cross-bar style design.
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Physical Design and STA team lead with a proven track record of leading execution on highly complex and cutting edge chips across multiple technology nodes over 10+ years. Solid technical base with strong communication skills, cross-functional leadership, and vendor/customer management abilities. Main areas of expertise include architecting and implementing custom solutions for structured place & route, optimizing physical design implementation & methodology development to improve efficiency. Areas of Expertise: Technical Leadership for end-to-end design closure Leading design engagements with external customers Planning and implementation of crossbar style designs Block Level and Top Level Physical Design (Talus, ICC and EDI) - Netlist to GDSII Chip level and block level timing constraint development (SDC, PT TCL) Chip level Analog Layout and Verification (Virtuoso, Calibre, Assura) Static Timing Analysis (STAR-RC / PT-SI, QRC / ETS) Signoff Checks (DRC / LVS / EM / Dynamic IR) Design Flow Automation (Tool Native Tcl / Perl / SKILL)
...See MoreWork Experience
soc physical design manager at apple
Computers and Electronics Manufacturing
Yash Vyavaharkar's Professional Milestones
- soc physical design manager at apple (2018-07-01~): Developed and executed immersive virtual environments to enhance the company's digital presence.
- Physical Design Engineer (2011-12-01~2012-07-01): Designing cutting-edge and sustainable construction solutions for complex engineering projects.
Skill
Static Timing Analysis
Asic
Physical Design
Soc
Tcl
Vlsi
Timing Closure
Perl
Place And Route
Primetime
Logic Synthesis
Microcontrollers
Eda
Lvs
Timing
Mixed Signal
Signal Integrity
Physical Verification
Power Management
Low Power Design
Magma
Certification
Colleagues
Other Named Yash Vyavaharkar
Frequently asked questions
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Yash Vyavaharkar's social media include: Linkedin,
Yash Vyavaharkar works for Apple
Yash Vyavaharkar's role in Apple is soc physical design manager at apple
Yash Vyavaharkar works in the industry of Computers and Electronics Manufacturing
Yash Vyavaharkar's colleagues are Jai Ho,Abdoulrahman malkhouby,Zunaira Ijaz
Yash Vyavaharkar's latest job experience is soc physical design manager at apple at Apple