Yongwon Lee
Senior Principal PDC Engineer@ onsemi
Incheon, South Korea
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Yongwon Lee is a highly experienced professional with 32.8 years of work experience in the semiconductor industry. He has expertise in PDK (Process Design Kit) and EDA (Electronic Development Automation) and has led the development of internal and third-party PDKs. He is skilled in integrated circuit design methodology and EDA tools from front-end to back-end design tools. Yongwon Lee has a strong background in developing Calibre/Assura/Diva Verification Rule decks and Cadence Pcells. He is also skilled in troubleshooting and implementing automation tools and scripts. Yongwon Lee is based in South Korea.
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Emails and Phone Numbers

@fairchildsemi.com
@onsemi.com
@msn.com
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About

• 20+ years experience in PDK (Process Design Kit) and EDA (Electronic Development Automation) area in the semiconductor industry. • Led the PDK development focusing on development, qualification and automation of internal and third party PDKs. • Wide knowledge of integrated circuit (Analog/Digital) design methodology and EDA tools from front-end to back-end. • Experience in providing best practice methodologies on back-end design tools for company-wide design use based on standardization and automation. • Technical leader who provided mentoring to the PDK team members and R&D engineers. SKILL • Expert in establishing and releasing whole PDK configuration • Expert in developing Calibre/Assura/Diva Verification Rule decks (DRC/LVS/LVL/ERC/PERC/QRC/PEX) of Analog IC Processes (LVIC/BiCMOS/HVIC). • Expert in developing Calibre/Assura Verification Rule decks (DRC/LVS/LVL) of Discrete Processes. • Expert in developing Cadence Pcells (Parameterized Cells) of Analog and Discrete processes. • Expert in developing Symbol, CDF (Component Description Format) and Callbacks of Analog and Discrete processes. • Expert in developing Cadence Technology Libraries of Analog and Discrete processes. • Expert in validating Process Design Kit (PDK QA) using various test cases. • Expert in developing tools and scripts of PDK Automation and Design Environment enhancement • Expert in troubleshooting (providing solutions, workaround and, fix bugs) on environment issues and bugs of PDK and Design issues. • Experienced in programming using SKILL(Cadence Script Language), Perl, TCL and Csh/Bash Shell Script • Experienced in migrating verification rule decks among Dracula, Diva, Assura and Calibre. • Experienced in migrating Cadence Platform from CDB to OA using automation script developed myself. • Experienced in evaluating various frontend/backend tools of Mentor and Cadence. • Experienced in establishing methodologies on PDK development flows • Experienced in collaborating relationships with EDA tool vendors (Cadence and Mentor). • Experienced in working with Design IT to enhance and rollout infrastructure changes in environment setup and license management. • Experienced Commercial EDA tools: Cadence ADE/Spectre/AMS/Encounter/RTL Compiler • Experienced in using and supporting data revision control systems: Synchronicity, Cliosoft , ICmanage • Experienced in collaborating relationships with EDA tool vendors (Cadence and Mentor)

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Work Experience

5701 N. Pima Rd, Scottsdale, Arizona, 85250, US

Semiconductor Manufacturing

13894
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Yongwon Lee's Professional Milestones

  • Principal Design Automation Engineer (1999-01-01~2016-08-01): Implementing efficient and high-quality automation systems to streamline project delivery and improve overall product performance.
  • Senior Principal PDC Engineer (2016-09-01~): Developing cutting-edge PDC solutions to optimize production processes and enhance company productivity.

Education

Samsung Technical Academy
Samsung Technical Academy

Electronics,

Engineering,

Communications,

Bachelors,

Electrical,

Electronics And Communications Engineering

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