Yves Dubois
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Yves Dubois is an experienced Asic Physical Design Engineer with over 20 years of work experience. He has a strong skill set in various areas such as fpga, fpga, soc, ii, verilog, vhdl, dft, rtl design, static timing analysis, pcie, microcontrollers, p&r, formal proof, timing closure, power analysis, signal integrity, physical verification, and logic synthesis. Yves has worked at reputable companies like Atos, MELEXIS, Bull, Thales, Nokia, and Xerox, gaining expertise in the field of semiconductor manufacturing and digital design.
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Emails and Phone Numbers
Work Experience
Lead Physical Design Engineer
Yves Dubois's Professional Milestones
- ASIC Physical Design Engineer (2019-05-01~): Designing cutting-edge designs, elevating design standards for maximum performance and efficiency.
- Fpga Design Engineer (2010-06-01~2010-08-01): Developed innovative FGGA applications to streamline production processes and streamline operational processes.
Skill
Asic
Fpga
Soc
Ic
Verilog
Vhdl
Dft
Rtl Design
Static Timing Analysis
Pcie
Microcontrollers
P&r
Formal Proof
Timing Closure
Power Analysis
Signal Integrity
Physical Verification
Logic Synthesis
Certification
Colleagues
Stefan Schwarz
senior systems architect product owner requirement engineer teamleader
Piotr Hadaschik
Senior Business Analyst | Product Owner | Technical Project Lead
Tathagata Chaudhuri
Product Owner | Business Analyst | Product Management | Jira CLOUD | Confluence | RTC | UI/UX | UAT | ALM | Certified Scrum Product Owner(CSPO) | Certified AWS Cloud Practioner | Domain : Logistics, Connected Cars, IOT
Artur Blok
functional owner at eviden
Rico Kahden
Product Owner | Lead Business Analyst
Other Named Yves Dubois
Frequently asked questions
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Yves Dubois works for Eviden
Yves Dubois's role in Eviden is Lead Physical Design Engineer
Yves Dubois's colleagues are Stefan Schwarz,Piotr Hadaschik,Tathagata Chaudhuri
Yves Dubois's latest job experience is Lead Physical Design Engineer at Eviden