Zev Gross C.I.D

Sr PCB Designer, Cadence Allegro PCB design of high density, high speed,multi layer complex boards, (12-18 layers), 10-15K pads. Ranging from Motherboards, Backplanes, PCIE cards, power boards, commercial products, hand held devices with RF and many others. A majority of them involved heavy interaction to Mechanical enclosures Many of these designs include Back to back, large BGA pin counts placement and routing using blind & buried vias, laser Via. Placement & routing, large connector pin counts/fine pitch connectors. Manual, and Auto routing. Controlled impedance routing of all types, of technologies: RF, Analog Digital routing over split-planes, Hi-Speed, wireless/Cellular, PCIexpress, SCSI, Atca,I/O routing, ECL, Video Interface, Memory Routing, Power Supply, high voltage Extensive knowledge, in constrains manager: Differential pairs, I2C match length, Clk signals Backplane, mother/ daughter boards, Memory Routing Ability to review a bill of material & locate the necessary footprints Support the schematic symbol/PCB footprint library utilizing Capture CIS Upload and debug schematic capture, in to Allegro platform Placement, using Capture to Allegro CrossProbe, Knowledge in RF placement Implementation of constrains in OrCad capture, Calculating control impedance, stack up building, using Polar Produce production files, for PCB manufacture, and assembly, including ODB++ Checking, for short nets, and disconnected nets, in PCB using Valor Trilogy Ability to converse, with Pcb/assembly personal and supplying answers Building panels, for reflow and wave soldering Specialties: Purchasing, allegro/OrCad interface, Production.