vinayak gundur
senior layout design engineer at sankalp semiconductor@ HCLTech
Bengaluru, Karnataka, India
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Vinayak Gundur is a technical lead with 5 years of experience in Analog and Mixed Signal Layout design. He currently works at 7nm Intel project and is responsible for smooth execution of tasks with 2-3 members. Vinayak is skilled in floor planning, placement, power planning, routing, LVS, DRC Flows, RV improvements, and ECO implementation. He has excellent problem-solving and communication skills, and is proficient in using technologies such as Cadence Virtuoso XL and EXL. Vinayak has experience in floor planning, placement, power planning, routing, solved LVS, DRC, IR drop issues, bundle flows, and PLL. He has also worked on training projects and has experience in
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Emails and Phone Numbers

@hcltech.com
@sankalpsemi.com
+91 408682****
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About

Presently, working as a technical lead with 5 Years of experience in Analog and Mixed Signal Layout design in HCL Technologies - Sankalp Semiconductor Pvt. Ltd. Currently working in 7nm Intel project and handling a domain with 2-3 members. Responsible for smooth execution of the task interacting with customer. Understanding the requirement and delivering the task on time with high end quality. Experience : • Experienced in floor planning, Placement, Power Planning, Routing, LVS, DRC Flows, RV improvements & ECO implementation. • Excellent problem-solving, written and interpersonal communication skills • Expertise in delivering layouts in accordance with the time lines and specifications required by clients. Technology: - Intel 7nm and 14nm - GPDK 45nm technology - UMC 180nm technology Tools Used : 1. Cadence Virtuoso XL and EXL 2. Genesys 3. Calibre for Layout Verification 4. Totem for RV analysis Worked in projects : MIPI : Layout design of the different domain sub blocks and verification in intel 7nm. Floor plan • Placement & base DRC clean up • Routing • solved LVS, DRC, & bundle flows. DDR : worked in Layout design of Transmitter(Tx) & MISC domain sub blocks.(buffers, level shifter etc) • Floor plan • Placement & base DRC clean up • Routing • solved LVS, DRC, IR drop issues & bundle flows. GDDR : worked in Layout design of Transmitter(Tx) & Receiver(Rx) domain sub blocks(serdes, DFE slicers, Driver, amplifiers, rdacs ) • Floor plan • Placement & base DRC clean up • Routing • solved LVS, DRC, IR drop issues & bundle flows. PLL : Worked in GPDK 45nm technology (training project) ALU : Worked in UMC 180nm technology (training project) & was also trained for genesys 14nm intel technology with training blocks.

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Work Experience

Noida, Uttar Pradesh, 201301, IN

IT Services and IT Consulting

259043
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vinayak gundur's Professional Milestones

  • Senior Layout Design Engineer (2018-06-01~): Creating innovative and scalable layout designs that exceed client expectations.
  • senior layout design engineer at sankalp semiconductor: Designing and implementing innovative layout design solutions for complex systems.

Education

PC Jabin Science College - India
PC Jabin Science College - India2015-2018