ASIC Engineer@ Juniper Networks
San Francisco, California, United States
wenrui zhou
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University of Southern California
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FlashIntel GPTWenrui Zhang is an ASIC Engineer with 12.1 years of experience. He is skilled in modelsim, verilog, vhdl, c, fpga, cadence vituoso, synopsys primetime, design compiler, encounter, formal verification, jasper, and sva. He is currently working at Juniper Networks in San Francisco, California. Previously, he worked at Marvell Technology as an Asic Design Engineer and at the University of Southern California as a Graduate Student.
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About
ASIC Engineer at Juniper Networks
Work Experience
Asic Engineer
ASIC Engineer
Software Development
wenrui zhou's Professional Milestones
- Asic Design Engineer (2013-07-01~2014-05-01): Developing innovative engineering solutions to enhance product functionality and revolutionize workplace conditions.
- Graduate Student (2011-09-01~2013-05-01): Graduated with honors, equipped with knowledge and skills to make a lasting impact on society.
Education
Electrical And Electronics Engineering
1293840000-1356998400Skill
Modelsim
Verilog
Vhdl
C
Fpga
Cadence Vituoso
Synopsys Primetime
Design Compiler
Encounter
Formal Verification
Jasper
Sva
Certification
Colleagues
Prasanna BK
Product Owner | ServiceNow Solution Architect
Kevin Crossman
IT Manager | Content Collaboration Service Owner
Mary Chambers
Process Owner
Glenn Moores
Lead Architect | Product Owner | Solution & Service Designer | Business Analyst Contractor
Shiloh Benda
Business Owner
Other Named wenrui zhou
Frequently asked questions
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wenrui zhou's social media include: Linkedin,
wenrui zhou works for Juniper Networks
wenrui zhou's role in Juniper Networks is ASIC Engineer
wenrui zhou works in the industry of Software Development
wenrui zhou's colleagues are Prasanna BK,Kevin Crossman,Mary Chambers
wenrui zhou's latest job experience is ASIC Engineer at Juniper Networks
wenrui zhou's latest education in University of Southern California
